SparseTIR: Sparse Tensor Compiler for Deep Learning
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Updated
Mar 31, 2023 - Python
SparseTIR: Sparse Tensor Compiler for Deep Learning
Experimental tensor compiler with a Python frontend, typed SSA IR, semantics preservation tests, and Metal lowering.
Optimizing RetinaFace inference using TVM.
A tiny educational tensor compiler built from scratch to explain the core ideas behind Apache TVM.
Tiny tensor compiler: one tensor program compiled to a GPU simulator (tiny-gpu) and a systolic-array TPU (tiny-tpu), checked bit-exact against numpy.
Tensor-aware meta-tracing JIT
SchedForge — A Target-Aware CPU Tensor Compiler. Forge tensor schedules into efficient CPU code.
Verified C++20 tensor compiler/runtime with bounded graph execution, Mul/ReGLU workloads, independent verification, and reproducible evidence.
Tensor compiler: PyTorch model -> graph fusion -> loop-nest IR -> tiling/AVX2/OpenMP C and CUDA shared-memory kernels, with autotuning and roofline analysis. In active development.
A tensor compiler that writes its own ARM64 machine code. Pure Python standard library — no LLVM, no assembler, no numpy. Every instruction verified against Apple's own assembler.
Tensor graph compiler in Rust: bit-exact CPU backends, ONNX import and an optional wgpu GPU backend (Vulkan, Metal, DX12). Every claim is tested and measured; GPU numerics are documented.
A small ahead-of-time compiler for tensor expressions, written in C++20. It parses a simple language, infers shapes, builds an SSA graph IR, and runs passes like constant folding, operator fusion, and buffer reuse. It then generates C++ and CUDA code, with benchmarks comparing fused and unfused output.
Tensor compiler using JIT kernel generation for ARM processors
A tensor compiler for the transformer nanoinfer runs by hand: graph IR with symbolic shapes, fusion, schedules and C codegen, checked against nanoinfer
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