Open Source Architecture Code Analyzer
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Updated
Oct 13, 2026 - Jupyter Notebook
Open Source Architecture Code Analyzer
A highly-flexible GPU simulator for AMD GPUs.
Extra-P, automated performance modeling for HPC applications
A framework to find good combinations of optimizations for computational kernels on GPUs.
This python package provides various tools to predict energy expenditure and recovery dynamics of an athlete. The name pypermod stands for Python Performance Modeling.
Nebula: a microarchitecture simulator built from loosely coupled microservices
Ampere's CPU Performance Model
Performance Modeling and Sandboxing for Microservices Applications
Dnnamo: Tools for Analysis, Modeling, and Optimization of Deep Neural Networks
Taint-based program analysis framework for empirical performance modeling.
Modelling parallel processing with GPU
CM-DARE is a measurement infrastructure for monitoring distributed training in Google Cloud (ICDCS'20)
Open-source NAND flash controller architecture lab with an executable FTL and channel scheduler simulator, Linux PCI/blk-mq driver scaffolding, fio workloads, and a roadmap toward QEMU, firmware, and FPGA validation.
When does network, reliability, or recovery investment beat buying more GPUs? Accounting framework, substitution metric, and decision maps for AI training infrastructure. Paper + reproducible model.
A compiler for MiniC, a small C dialect, with six toggleable optimization passes and an ML model that recommends which passes to enable for each program. Every result is measured by timing real compiled binaries.
Cycle-Accurate Simulator of the Atalla-0x01
A more abstract interpretation and formalization of the established three component hydraulic model by Morton. We remove its ties to concrete metabolic measures and use evolutionary computation to fit its parameters to an athlete.
Source code for the work "dSpark: Deadline-Based Resource Allocation for Big Data Applications in Apache Spark" published in IEEE e-Science 2017
Silicon workbench for chip blueprints, roofline analysis, tile-memory flow, and AI accelerator co-design.
Trace-driven research harness for KV-cache hierarchy policy evaluation in long-context LLM inference.
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