16-bit RISC Processor

A custom 16-bit RISC processor implemented in Verilog, featuring a multi-cycle datapath and FSM-based control unit.

Features 16-bit datapath with ALU, register file, program counter, instruction decoder, and memory. Six-state FSM for sequential instruction execution. Supports arithmetic, logical, comparison, shift, load, and jump operations. RTL simulation, synthesis, and FPGA implementation using Xilinx Vivado.