Two-channel, trigger-synchronized acquisition hardware for µs-scale signals
NanoPulse is a custom precision digitizer designed for repeatable capture of µs-scale analog pulses where vertical resolution, trigger determinism, and low drift matter more than GHz bandwidth.
The board centers on the Analog Devices AD4630-24, a 24-bit SAR ADC capable of up to 2 MSPS, with a low-noise reference path, fully differential analog front end, external trigger conditioning, and separate 1.8 V / 3.3 V digital domains.
Analog Input CH1 ──> FDA / input network ──┐
│
├──> AD4630-24 ──> SPI / BUSY ──> MCU
│
Analog Input CH2 ──> FDA / input network ──┘
External Trigger ──> Schmitt conditioning ──> level translation ──> CNV
5 V reference rail ──> LTC6655-5 ──> ADC REF
Power rails:
+5.4 V / -5.4 V analog
+3.3 V digital
+1.8 V ADC I/O
| Parameter | Design value |
|---|---|
| ADC | Analog Devices AD4630-24 |
| Resolution | 24 bit |
| Maximum sample rate | 2 MSPS |
| Channels | 2 differential |
| Target analog bandwidth | ~300–600 kHz |
| Practical pulse-width range | ≥5–10 µs for waveform shape capture |
| Trigger | External digital input + manual trigger |
| ADC reference | LTC6655-5 |
| ADC I/O domain | 1.8 V |
| MCU / logic domain | 3.3 V |
| Analog rails | approximately ±5.4 V |
The input network is intentionally bandwidth-limited rather than optimized for ns-scale edges. Series resistance and small capacitors around the fully differential amplifier provide damping, noise filtering, and settling behavior appropriate for hundreds-of-kHz signals.
The intended operating region is roughly 300–600 kHz usable analog bandwidth, depending on populated RC values.
The ADC reference uses an LTC6655-5 low-noise, low-drift reference with local decoupling close to the converter. Reference stability is especially important when the goal is high-resolution repeated pulse measurements rather than only edge detection.
The external trigger is conditioned before reaching the ADC conversion input:
TRIG IN → Schmitt buffer → logic / source selection → level translator → CNV
An optional 50 Ω termination can be populated for coax-driven laboratory trigger sources.
The AD4630-24 uses a 1.8 V digital I/O domain, while the host MCU operates at 3.3 V. Level translators isolate the two domains for SPI, BUSY, and trigger/control signals.
Series damping resistors are used on high-speed digital edges, including ADC input-control paths, to reduce ringing and improve edge quality at the converter.
NanoPulse is suitable for experiments such as:
- pulse shape and repeatability measurements
- battery pulsed-load / DCIR experiments
- PMIC and power-rail transient capture
- ultrasonic or sonar baseband echo logging
- slow precision laboratory automation
It is not intended as a replacement for a high-bandwidth oscilloscope. For ns-scale transitions or RF waveform capture, a conventional high-bandwidth DSO or GHz digitizer is the appropriate instrument.
- Verify all power rails with the ADC disconnected or held inactive.
- Verify the 5.000 V reference rail and reference stability.
- Confirm trigger conditioning and 1.8 V CNV levels.
- Short the analog input and measure baseline RMS code spread.
- Apply a known step or pulse and inspect settling/ringing.
- Run repeated captures to characterize trigger consistency.
- Log a long shorted-input acquisition to evaluate baseline drift.
The repository contains the PCB design, schematic, manufacturing files, and supporting hardware documentation.
Firmware is intentionally separated from the hardware design.
This project demonstrates:
- precision mixed-signal PCB design
- high-resolution SAR ADC integration
- differential analog front-end design
- reference and low-noise power architecture
- digital level translation
- trigger conditioning
- converter-side signal-integrity considerations
- laboratory bring-up planning
Author: Majed / DevMajed